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With preliminary injunctions becoming a decisive battleground in global SEP and FRAND disputes, this session explores how courts across key jurisdictions are shaping access to—and constraints on—injunctive relief. From the Vodafone/HMD matter in Germany to expanding dockets in Brazil, India, and China, this session unpacks strategic use of injunctions by both SEP holders and implementers, while spotlighting where legal frameworks may shift next. Explore how national courts and the UPC are interpreting proportionality, the influence of the European Commission, and the contrasting positions across global IP enforcement venues.

• Compare how courts in Germany, the UK, the UPC, and the US weigh proportionality, public interest, and enforcement policy when determining injunction relief in SEP cases

• Examine the rising use of anti-suit and anti-anti-suit injunctions in China, India, and the US, and how they affect global access to courts and the ability to litigate or settle FRAND terms.

• Explore how jurisdictions like Brazil and Colombia are shaping global negotiations through low-cost, fast granting preliminary injunctions and limited review of FRAND defences.

• Discuss the possibilities of Injunctive relief in the USA and a change from the eBay standard.

 

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter, Chief Strategy Officer and co-founder of Rivos Inc., brings a wealth of experience in tech innovation. He previously spent 11 years at Google as Senior Engineering Director in the Chrome OS Hardware team, where he spearheaded the development of new technologies for Chromebooks and collaborated with OEMs to bring them to market.

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter, Chief Strategy Officer and co-founder of Rivos Inc., brings a wealth of experience in tech innovation. He previously spent 11 years at Google as Senior Engineering Director in the Chrome OS Hardware team, where he spearheaded the development of new technologies for Chromebooks and collaborated with OEMs to bring them to market.

Mark’s extensive career also includes leadership roles at prominent semiconductor companies, including VP of Systems Engineering at P.A. Semi Inc. (acquired by Apple Inc.), Senior Manager of Hardware Systems Engineering at Broadcom Corporation, and System Architect at SiByte, Inc. His impressive background also features time at the Digital Equipment Corporation Systems Research Center and a PhD from the University of Cambridge Computer Laboratory.

 

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter, Chief Strategy Officer and co-founder of Rivos Inc., brings a wealth of experience in tech innovation. He previously spent 11 years at Google as Senior Engineering Director in the Chrome OS Hardware team, where he spearheaded the development of new technologies for Chromebooks and collaborated with OEMs to bring them to market.

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter

CSO and Co-Founder
Rivos

Mark Hayter, Chief Strategy Officer and co-founder of Rivos Inc., brings a wealth of experience in tech innovation. He previously spent 11 years at Google as Senior Engineering Director in the Chrome OS Hardware team, where he spearheaded the development of new technologies for Chromebooks and collaborated with OEMs to bring them to market.

Mark’s extensive career also includes leadership roles at prominent semiconductor companies, including VP of Systems Engineering at P.A. Semi Inc. (acquired by Apple Inc.), Senior Manager of Hardware Systems Engineering at Broadcom Corporation, and System Architect at SiByte, Inc. His impressive background also features time at the Digital Equipment Corporation Systems Research Center and a PhD from the University of Cambridge Computer Laboratory.

 

Vamsi Patti

Investor
Hitachi Ventures

Vamsi Patti

Investor
Hitachi Ventures

Vamsi Patti

Investor
Hitachi Ventures
 

Ian Buck

VP & GM, Hyperscale and HPC Computing
NVIDIA

Ian Buck

VP & GM, Hyperscale and HPC Computing
NVIDIA

Ian Buck

VP & GM, Hyperscale and HPC Computing
NVIDIA
 

Anil Ravindranath

Founder & CTO
rapt AI

Anil Ravindranath is Founder & CTO of rapt.ai where he leads the team building next gen Agentic-AI automation platform for GPUs. He is an industry veteran with over 20 years of experience in building enterprise products, and previously worked as Technical Director at Data Domain/EMC. Anil worked in system architecture, storage, data mgmt., scheduler algorithms, virtualization and apply heuristics for workload mgmt. and system efficiency. Anil has been granted with over 15 patents.

Anil Ravindranath

Founder & CTO
rapt AI

Anil Ravindranath

Founder & CTO
rapt AI

Anil Ravindranath is Founder & CTO of rapt.ai where he leads the team building next gen Agentic-AI automation platform for GPUs. He is an industry veteran with over 20 years of experience in building enterprise products, and previously worked as Technical Director at Data Domain/EMC. Anil worked in system architecture, storage, data mgmt., scheduler algorithms, virtualization and apply heuristics for workload mgmt. and system efficiency. Anil has been granted with over 15 patents.

 

Charles Alpert

AI Fellow
Cadence

Charles (Chuck) Alpert is Cadence’s AI Fellow and drives cross-functional Agentic AI solutions throughout Cadence’s software stack. Prior to this, has lead various pioneering teams in digital implementation, including Global Routing, Clock Tree Synthesis, Genus Synthesis, and Cerebrus AI.   Charles has published over 100 papers and received over 100 patents in the EDA space.  He is a Cadence Master inventor.  He has served as Deputy-Editor-in-Chief for IEEE Transactions on Computer-Aided Design, chaired the IEEE/ACM Design Automation Conference, and earned IEEE Fellow. He received a B.S.

Charles Alpert

AI Fellow
Cadence

Charles Alpert

AI Fellow
Cadence

Charles (Chuck) Alpert is Cadence’s AI Fellow and drives cross-functional Agentic AI solutions throughout Cadence’s software stack. Prior to this, has lead various pioneering teams in digital implementation, including Global Routing, Clock Tree Synthesis, Genus Synthesis, and Cerebrus AI.   Charles has published over 100 papers and received over 100 patents in the EDA space.  He is a Cadence Master inventor.  He has served as Deputy-Editor-in-Chief for IEEE Transactions on Computer-Aided Design, chaired the IEEE/ACM Design Automation Conference, and earned IEEE Fellow. He received a B.S. and B.A. Degree from Stanford University and a Ph.D. in Computer Science from UCLA.